JPH0127578B2 - - Google Patents
Info
- Publication number
- JPH0127578B2 JPH0127578B2 JP56215229A JP21522981A JPH0127578B2 JP H0127578 B2 JPH0127578 B2 JP H0127578B2 JP 56215229 A JP56215229 A JP 56215229A JP 21522981 A JP21522981 A JP 21522981A JP H0127578 B2 JPH0127578 B2 JP H0127578B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- regions
- logic circuit
- semiconductor element
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Layout of the interconnection structure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/923—Active solid-state devices, e.g. transistors, solid-state diodes with means to optimize electrical conductor current carrying capacity, e.g. particular conductor aspect ratio
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56215229A JPS58111347A (ja) | 1981-12-24 | 1981-12-24 | 半導体装置 |
US06/799,556 US4750026A (en) | 1981-12-24 | 1985-11-19 | C MOS IC and method of making the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56215229A JPS58111347A (ja) | 1981-12-24 | 1981-12-24 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58111347A JPS58111347A (ja) | 1983-07-02 |
JPH0127578B2 true JPH0127578B2 (en]) | 1989-05-30 |
Family
ID=16668840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56215229A Granted JPS58111347A (ja) | 1981-12-24 | 1981-12-24 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US4750026A (en]) |
JP (1) | JPS58111347A (en]) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2599349B2 (ja) * | 1984-08-23 | 1997-04-09 | 富士通株式会社 | 半導体装置 |
US5165086A (en) * | 1985-02-20 | 1992-11-17 | Hitachi, Ltd. | Microprocessor chip using two-level metal lines technology |
JPS63239674A (ja) * | 1987-03-27 | 1988-10-05 | Hitachi Ltd | ダイナミツク型ram |
JPH01251738A (ja) * | 1988-03-31 | 1989-10-06 | Toshiba Corp | スタンダードセル |
IL109491A (en) * | 1994-05-01 | 1999-11-30 | Quick Tech Ltd | Customizable logic array device |
KR100280772B1 (ko) * | 1994-08-31 | 2001-02-01 | 히가시 데쓰로 | 처리장치 |
US5581098A (en) * | 1995-05-05 | 1996-12-03 | Circuit Integration Technology, Inc. | Circuit routing structure using fewer variable masks |
US5907254A (en) * | 1996-02-05 | 1999-05-25 | Chang; Theodore H. | Reshaping periodic waveforms to a selected duty cycle |
JPH10335613A (ja) * | 1997-05-27 | 1998-12-18 | Mitsubishi Electric Corp | 半導体集積回路装置 |
JP3110422B2 (ja) | 1998-06-18 | 2000-11-20 | エイ・アイ・エル株式会社 | 論理ゲートセル |
US6399972B1 (en) * | 2000-03-13 | 2002-06-04 | Oki Electric Industry Co., Ltd. | Cell based integrated circuit and unit cell architecture therefor |
TWI434405B (zh) * | 2011-06-07 | 2014-04-11 | Univ Nat Chiao Tung | 具有積體電路與發光二極體之異質整合結構及其製作方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4053336A (en) * | 1972-05-30 | 1977-10-11 | Ferranti Limited | Method of manufacturing a semiconductor integrated circuit device having a conductive plane and a diffused network of conductive tracks |
JPS51146195A (en) * | 1975-06-11 | 1976-12-15 | Fujitsu Ltd | Diode device |
DE2823555A1 (de) * | 1977-05-31 | 1978-12-07 | Fujitsu Ltd | Zellenfoermige integrierte schaltung |
JPS5925381B2 (ja) * | 1977-12-30 | 1984-06-16 | 富士通株式会社 | 半導体集積回路装置 |
JPS5598852A (en) * | 1979-01-23 | 1980-07-28 | Nec Corp | Memory device |
JPS55120148A (en) * | 1979-03-09 | 1980-09-16 | Sanyo Electric Co Ltd | Semiconductor integrated circuit |
JPS5791553A (en) * | 1980-11-29 | 1982-06-07 | Toshiba Corp | Semiconductor device |
-
1981
- 1981-12-24 JP JP56215229A patent/JPS58111347A/ja active Granted
-
1985
- 1985-11-19 US US06/799,556 patent/US4750026A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPS58111347A (ja) | 1983-07-02 |
US4750026A (en) | 1988-06-07 |
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